NAND and NOR are the workhorses of digital logic — not because they are the most intuitive, but because each one alone can build every other logic gate. This universality makes them the preferred building block of real semiconductor chips, where millions of NAND gates lie behind every function a processor performs.
What is a NAND gate?
NAND stands for "Not AND." A NAND gate takes two inputs and produces an output that is the inverse of an AND gate: its output is 1 in all cases except when both inputs are 1.
NAND truth table:
| Input A | Input B | AND (A AND B) | NAND (NOT (A AND B)) |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
The only row where NAND outputs 0 is when both inputs are 1.
Boolean expression: NAND(A, B) = NOT(A AND B) = ¬(A · B)
The NAND gate symbol is the same as an AND gate but with a small circle (bubble) at the output, indicating the inversion.
What is a NOR gate?
NOR stands for "Not OR." A NOR gate's output is the inverse of an OR gate: its output is 1 only when both inputs are 0 — as soon as any input is 1, the output becomes 0.
NOR truth table:
| Input A | Input B | OR (A OR B) | NOR (NOT (A OR B)) |
|---|---|---|---|
| 0 | 0 | 0 | 1 |
| 0 | 1 | 1 | 0 |
| 1 | 0 | 1 | 0 |
| 1 | 1 | 1 | 0 |
The only row where NOR outputs 1 is when both inputs are 0.
Boolean expression: NOR(A, B) = NOT(A OR B) = ¬(A + B)
What makes NAND (and NOR) a "universal gate"?
A universal gate is one from which every other Boolean logic gate can be built using only that one gate type. NAND is universal because:
| Gate needed | Built from NAND gates | How |
|---|---|---|
| NOT A | One NAND with both inputs tied to A | NAND(A, A) = NOT(A AND A) = NOT A |
| A AND B | NAND followed by NOT | NOT(NAND(A, B)) = A AND B |
| A OR B | NOT A NAND NOT B | Apply De Morgan's law: NOT(NOT A AND NOT B) = A OR B |
| A XOR B | Four NAND gates in a specific arrangement | NAND-based XOR circuit |
This means a chip manufacturer only needs to produce one type of gate — the NAND gate — and can implement any Boolean logic from it. This simplifies manufacturing, reduces design complexity, and lowers costs. CMOS NAND gates (the technology used in modern chips) are also particularly efficient to manufacture.
How do you build a NOT gate from NAND?
Connect both inputs of a NAND gate to the same signal A:
NAND(A, A) = NOT(A AND A) = NOT A
Truth table verification:
| A | NAND(A, A) | Expected NOT A |
|---|---|---|
| 0 | NOT(0 AND 0) = NOT 0 = 1 | 1 ✓ |
| 1 | NOT(1 AND 1) = NOT 1 = 0 | 0 ✓ |
This is not just a theoretical trick — it is exactly how NOT gates are implemented in NAND-based circuits on real chips.
How do you build an AND gate from NAND?
Follow a NAND gate with a NOT gate (itself built from a NAND with tied inputs):
AND(A, B) = NOT(NAND(A, B))
First gate: NAND(A, B) → output N
Second gate: NAND(N, N) → NOT N = AND(A, B)
Verification (row A=1, B=1):
- NAND(1, 1) = 0
- NOT(0) = NAND(0, 0) = 1
- AND(1, 1) should be 1 ✓
What are the differences between all basic logic gates?
| Gate | Output is 1 when… | Boolean |
|---|---|---|
| AND | All inputs are 1 | A · B |
| OR | At least one input is 1 | A + B |
| NOT | Input is 0 | ¬A |
| NAND | Not all inputs are 1 | ¬(A · B) |
| NOR | All inputs are 0 | ¬(A + B) |
| XOR | Exactly one input is 1 | A ⊕ B |
NAND and NOR are each the complement (inverse) of AND and OR respectively. Their universality comes from combining inversion with the basic operation.
Frequently asked questions
Do I need to know NAND and NOR for the GCSE exam?
Yes for some specifications. AQA GCSE Computer Science includes logic gates (AND, OR, NOT, XOR) and truth tables as core content. OCR J277 also includes NAND and NOR explicitly. If your specification includes them, you should be able to: (1) complete a NAND or NOR truth table, (2) write the correct Boolean expression, and (3) explain the universal gate property. Check your specification for the exact gate types required.
Why do real chips use NAND rather than AND and NOT separately?
CMOS NAND gates use fewer transistors than building AND + NOT separately. A CMOS AND gate is actually implemented as NAND followed by NOT internally — so AND is the more complex composite circuit, and NAND is the primitive. This seems counterintuitive given that AND is conceptually simpler, but chip design optimises for transistor count and switching speed, not conceptual simplicity.
Is NOR also a universal gate?
Yes. NOR has the same universality property as NAND — every logic gate (NOT, AND, OR, XOR) can be constructed from NOR gates alone. NOT A is NOR(A, A). OR(A, B) is NOT(NOR(A, B)) — built as NOR(NOR(A,B), NOR(A,B)). The choice between NAND-only and NOR-only design depends on the specific technology and the optimisation goals of the chip being built.
How does the NAND universal gate property relate to De Morgan's laws?
De Morgan's laws state: NOT(A AND B) = NOT A OR NOT B and NOT(A OR B) = NOT A AND NOT B. These identities are exactly what allow NAND to implement OR (and NOR to implement AND): since NAND(A,B) = NOT A OR NOT B, combining NAND gates with appropriate input inversions (themselves NAND gates) gives you any Boolean function. De Morgan's laws are the algebraic proof of why universal gates work.
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