A register is a very small, very fast storage location inside the CPU that holds a single value the processor is working on right now. GCSE Computer Science requires five by name: the Memory Address Register, Memory Data Register, Program Counter, Current Instruction Register and Accumulator.
Why does a CPU need registers when it has RAM?
RAM is fast by human standards and slow by CPU standards. Fetching a value from main memory takes many clock cycles; reading a register takes essentially none, because the register sits on the same silicon as the arithmetic circuits. Registers are the processor's working surface — the desk it puts things down on while it is thinking.
Each register holds only a handful of bytes, typically one machine word. There are very few of them. That scarcity is the point: they are expensive to build, so a CPU keeps only what it needs for the instruction currently in progress.
The five registers you need to know
The Program Counter (PC)
The Program Counter holds the memory address of the next instruction to be fetched. It is not the instruction itself, only the address of where to find it.
After each fetch, the PC is incremented so it points at the following instruction. When a program branches — an IF statement, a loop, a subroutine call — the branch works by writing a different address into the PC. That single mechanism is how all control flow in a computer ultimately happens.
The Memory Address Register (MAR)
The MAR holds the address in memory that is about to be read from or written to. When the CPU wants to fetch an instruction, it copies the address out of the PC and into the MAR. The address bus then carries that address to memory.
The MAR is used for both instructions and data. Anything that involves touching main memory goes through it.
The Memory Data Register (MDR)
The MDR holds the data or instruction that has just been read from memory, or is about to be written to it. It is sometimes called the Memory Buffer Register.
The MAR and MDR are a matched pair: the MAR says where, the MDR carries what. Data travels between the MDR and memory along the data bus.
The Current Instruction Register (CIR)
Once an instruction has arrived in the MDR, it is copied into the CIR, where it is held while it is decoded and executed. Splitting the instruction out into its own register frees the MDR to fetch operands from memory during the execute stage without overwriting the instruction being carried out.
The Accumulator (ACC)
The Accumulator holds the result of calculations performed by the Arithmetic Logic Unit. When the ALU adds two numbers, the answer lands in the ACC; the next instruction can then add to it, compare it, or store it back to memory.
Its name is literal: values accumulate in it across a sequence of arithmetic instructions rather than being written out to memory each time.
How the registers work together in the fetch–decode–execute cycle
Take a single instruction, ADD 45 — meaning "add the value stored at address 45 to the accumulator".
Fetch
- The address in the PC is copied to the MAR.
- The PC is incremented, so it already points at the next instruction.
- The address in the MAR travels along the address bus; memory returns the instruction along the data bus into the MDR.
- The instruction is copied from the MDR into the CIR.
Decode
- The control unit examines the instruction in the CIR and splits it into an opcode (
ADD) and an operand (45).
Execute
- The operand address 45 is placed in the MAR; the value stored there is fetched into the MDR.
- The ALU adds that value to the current contents of the ACC, and the result is stored back in the ACC.
The cycle then repeats with whatever address the PC now holds. Notice how the PC was incremented during the fetch, long before the execute stage finished — that is what allows a branch instruction later in the cycle to overwrite it cleanly.
A quick reference table
| Register | Full name | Holds | Used during |
|---|---|---|---|
| PC | Program Counter | Address of the next instruction | Fetch |
| MAR | Memory Address Register | Address being read/written | Fetch and execute |
| MDR | Memory Data Register | Data/instruction in transit | Fetch and execute |
| CIR | Current Instruction Register | The instruction being executed | Decode and execute |
| ACC | Accumulator | Result of ALU calculations | Execute |
Common exam mistakes
- Saying the PC holds the current instruction. It holds the address of the next one. Both words matter.
- Confusing MAR and MDR. A memory aid: Address Register for the address, Data Register for the data.
- Forgetting the MAR and MDR are reused during execute. They are not only fetch-stage registers; fetching an operand uses them too.
- Describing the CIR as storing all the program's instructions. It stores exactly one.
- Treating registers as a type of RAM. They are inside the CPU, they are far faster, and there are only a handful of them.
How registers relate to cache and RAM
It helps to picture the memory hierarchy as a ladder, fastest and smallest at the top:
- Registers — a few bytes each, effectively instant.
- Cache — a few megabytes, very fast, holds recently or frequently used data.
- RAM — gigabytes, fast, volatile, holds running programs.
- Secondary storage — very large, much slower, non-volatile.
Each level down is bigger and cheaper per byte, and slower. Registers sit at the very top because there is nowhere faster to put anything.
Frequently asked questions
What is the difference between the MAR and the MDR?
The MAR holds an address — a location number in memory. The MDR holds the contents of a memory location, either data just read or data about to be written. In a memory read, the CPU puts the address in the MAR, memory looks it up, and the value comes back into the MDR. They always operate as a pair, and confusing them is one of the most common ways to lose a mark on architecture questions.
Why is the Program Counter incremented during the fetch stage rather than at the end?
Incrementing early means the PC is already correct for the next fetch before the current instruction has finished executing. If the instruction turns out to be a jump or branch, the execute stage simply overwrites the PC with the target address — no need to undo an increment. It also means the fetch stage can begin for the next instruction as soon as the hardware allows, which is what makes pipelining possible in more advanced processors.
How many registers does a real CPU have?
Far more than the five named at GCSE. A modern processor has dozens of general-purpose registers, plus floating-point registers, status flags and control registers. GCSE deliberately teaches a simplified model with one accumulator, because it makes the fetch–decode–execute cycle easy to follow. The principle is unchanged: registers are the fastest storage available, and there are never many of them.
Do registers lose their contents when the computer is switched off?
Yes. Registers are volatile, like RAM and cache — their contents exist only while the CPU is powered. Anything that must survive a power-off has to be written to secondary storage such as an SSD or hard disk. This is why an unsaved document disappears when a machine loses power: the work existed only in volatile memory.
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